The present invention relates to a D/A converter of a multibit type.
A D/A converter of a 1-bit type is often adopted in D/A converters used in a digital audio device such as a CD player, etc. when a high accuracy equal to or greater than 16 bits is required. The reasons for this are as follows. The D/A converter of the 1-bit type is constructed by one constant electric current source and one electric current switch. Accordingly, the D/A converter of the 1-bit type has advantages in that no nonlinearity is caused in principle by dispersion of mutual electric current values of plural constant electric current sources as a defect of the D/A converter of a multibit type and no noise (glitch) in a transient area is caused in principle by a shift in on-off timing of plural electric current switches.
The D/A converter of the 1-bit type will next be explained with reference to FIG. 1. A digital audio signal having an FS (Hz) in sampling frequency and 16 bits in word length is supplied to a digital low pass filter section 2 having an audible band (0 to 20 kHz) as a passing band through an input terminal 1. In the digital low pass filter section 2, the sampling frequency is upsampled 8 times and a digital audio signal having this upsampled sampling frequency is outputted therefrom. This digital audio signal as an output of the digital low pass filter section 2 is supplied to a linear interpolating section 3 and the sampling frequency is further upsampled 8 times and a digital audio signal having 64FS (Hz) in sampling frequency is outputted therefrom. A word length of the digital audio signal outputted from this linear interpolating section 3 is constructed by 20 bits by a calculation of the linear interpolating section 3 so that this word length is longer by 4 bits than the input word length of 16 bits.
The digital audio signal outputted from the linear interpolating section 3 is supplied to a noise shaper section (.DELTA.-.SIGMA. modulator) 4 so that this digital audio signal is quantized to 4 bits. In this noise shaper section 4, a low frequency band component of quantizing noises caused in the quantization of the input digital audio signal of 20 bits to 4 bits is shifted to a high frequency band and a dynamic range in the audible band (0 to 20 kHz) is secured.
The digital audio signal outputted from the noise shaper section 4 and having the 64FS (Hz) in sampling frequency and quantized to 4 bits is supplied to a PWM (pulse width modulation) pulse converting section 5. In the PWM pulse converting section 5, pulse width modulation of this digital audio signal is performed and the pulse width modulated audio signal is outputted to an output terminal 6. This PWM pulse converting section 5 is constructed by one constant electric current source and one electric current switch. In the PWM pulse converting section 5, frequency resolution of 64FS(Hz).times.16=1024FS(Hz), i.e., time axis resolution of {1/1024FS}(sec) is required to represent sixteen pulse widths according to inputted 4-bit data in one period, i.e., {1/(64FS)}(sec).
For example, the sampling frequency FS of a digital audio signal recorded on a CD (compact disk) is set to 44.1(kHz). Accordingly, a clock signal of 64FS(Hz).times.16=1024FS(Hz)=45.1584(MHz) is required and time resolution of a very high accuracy of (1/1024FS)=22.14(n sec) is required to D/A-convert the digital audio-signal.
In the conventional D/A converter of the 1-bit type shown in FIG. 1, the number of bits of the output digital audio signal of the noise shaper section 4 is set to 4 bits, but is generally set to approximately range from 1 to 5 bits. Output word lengths of the filter section 2 and the linear interpolating section 3 are each set to 8 bits, but are generally set to approximately range from 16 to 24 bits.
For example, such a D/A converter of the 1-bit type shown in FIG. 1 is a D/A converter having a high accuracy equal to or greater than 16 bits, but the frequency of a used clock signal is a very high frequency approximately ranging from 20 to 50 MHz and this converter has a high sensitivity with respect to a time axis. Therefore, when such a D/A converter is mounted on a print substrate, attention must be sufficiently paid in wiring of a line for transmitting the clock signal, etc. so as to minimize clock jitter. Further, since the frequency of the used clock signal is very high, considerably severe measures for unnecessary radiation are required. Therefore, a problem also exists in that cost is increased by adding parts for these measures, etc.
It is strongly required to reduce the frequency of the used clock signal in comparison with the conventional case with respect to the D/A converter mounted on an electronic device at low cost, especially, the D/A converter of an-electric current type and a D/A converter mounted on an amplifier for an audio/video corresponding to a multichannel source such as AC-3, etc. with respect to a reproducing device of a DVD (digital video disk) recently attracting public attention.
When an output bit length of PWM pulse data generated in the noise shaper section 4 is set to N (bits) and its calculating speed is set to Fop(Hz), a frequency Fmck1(Hz) of the clock signal used in the D/A converter of the 1-bit type is represented by the following formula (1). EQU Fmck1=2.sup.N.times.Fop (1)
It should be understood from this formula (1) that the output bit length N of the PWM pulse data generated from the noise shaper section 4 must be shortened or the calculating speed Fop of the noise shaper section 4 must be reduced to reduce the frequency Fmck1 of the clock signal.
However, the dynamic range is reduced by 6 dB every time the output bit length N of the PWM pulse data of the noise shaper section 4 is shortened by 1 bit. For example, when the noise shaper section 4 is constructed in a third order, the dynamic range is reduced by 21 dB every time the calculating speed is reduced to 1/2. Further, when the output bit length N is shortened, quantizing noises are increased. Accordingly, there is a fear that no stability of a system of the noise shaper section 4 can be compensated. Therefore, it is necessary to reduce a gain of input data in accordance with the increase in quantizing noises, and the dynamic range is really reduced greatly from the above 6 dB. Accordingly, it is impossible to shorten the output bit length N of the PWM pulse data. Further, no frequency of the clock signal used in the D/A converter of the 1-bit type can be generally reduced from the above about 20 to 50 (MHz).
Therefore, the D/A converter of a multibit type capable of reducing the frequency of the used clock signal is indispensable. The frequency Fmck2(Hz) of a clock signal used in the D/A converter of the multibit type is represented by the following formula (2) irrespective of the output bit length N of the PWM pulse data generated from the noise shaper section to represent level information in an amplitude direction. EQU Fmck2=Fop=Fmck1/2.sup.N (2)
As mentioned above, in the D/A converter of the multibit type, a PWM pulse converting section must be constructed by plural constant electric current sources and plural electric current switches respectively corresponding to these constant electric current sources. Accordingly, a problem exists in that performance of the D/A converter is deteriorated by dispersion of electric currents of the plural constant electric current sources and dispersion of switching timings of the plural electric current switches. Therefore, when the D/A converter of the multibit type is adopted, it is necessary to reduce the dispersion of the electric currents of the plural constant electric current sources as much as possible and reduce an influence of glitches generated by the dispersion of the switching timings of the plural electric current switches as much as possible.